55 #define RSS_HKEY_LEN 40
57 uint8_t rss_hkey[] = {
58 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A,
59 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A,
60 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A,
61 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A, 0x6D, 0x5A,
65 #define ROUNDUP(x, y) ((((x) + ((y)-1)) / (y)) * (y))
76 static char *AllocArgument(
size_t arg_len);
77 static char *AllocAndSetArgument(
const char *arg);
78 static char *AllocAndSetOption(
const char *arg);
80 static void ArgumentsInit(
struct Arguments *args,
unsigned capacity);
81 static void ArgumentsCleanup(
struct Arguments *args);
82 static void ArgumentsAdd(
struct Arguments *args,
char *value);
83 static void ArgumentsAddOptionAndArgument(
struct Arguments *args,
const char *opt,
const char *arg);
84 static void InitEal(
void);
86 static void ConfigSetIface(
DPDKIfaceConfig *iconf,
const char *entry_str);
87 static int ConfigSetThreads(
DPDKIfaceConfig *iconf,
const char *entry_str);
88 static int ConfigSetRxQueues(
DPDKIfaceConfig *iconf, uint16_t nb_queues);
89 static int ConfigSetTxQueues(
DPDKIfaceConfig *iconf, uint16_t nb_queues);
90 static int ConfigSetMempoolSize(
DPDKIfaceConfig *iconf, intmax_t entry_int);
91 static int ConfigSetMempoolCacheSize(
DPDKIfaceConfig *iconf,
const char *entry_str);
92 static int ConfigSetRxDescriptors(
DPDKIfaceConfig *iconf, intmax_t entry_int);
93 static int ConfigSetTxDescriptors(
DPDKIfaceConfig *iconf, intmax_t entry_int);
95 static bool ConfigSetPromiscuousMode(
DPDKIfaceConfig *iconf,
int entry_bool);
97 static int ConfigSetChecksumChecks(
DPDKIfaceConfig *iconf,
int entry_bool);
98 static int ConfigSetChecksumOffload(
DPDKIfaceConfig *iconf,
int entry_bool);
99 static int ConfigSetCopyIface(
DPDKIfaceConfig *iconf,
const char *entry_str);
100 static int ConfigSetCopyMode(
DPDKIfaceConfig *iconf,
const char *entry_str);
101 static int ConfigSetCopyIfaceSettings(
DPDKIfaceConfig *iconf,
const char *iface,
const char *mode);
107 const struct rte_eth_dev_info *dev_info,
struct rte_eth_conf *port_conf);
108 static int DeviceConfigureQueues(
DPDKIfaceConfig *iconf,
const struct rte_eth_dev_info *dev_info,
109 const struct rte_eth_conf *port_conf);
113 static void *ParseDpdkConfigAndConfigureDevice(
const char *iface);
114 static void DPDKDerefConfig(
void *conf);
116 #define DPDK_CONFIG_DEFAULT_THREADS "auto"
117 #define DPDK_CONFIG_DEFAULT_INTERRUPT_MODE false
118 #define DPDK_CONFIG_DEFAULT_MEMPOOL_SIZE 65535
119 #define DPDK_CONFIG_DEFAULT_MEMPOOL_CACHE_SIZE "auto"
120 #define DPDK_CONFIG_DEFAULT_RX_DESCRIPTORS 1024
121 #define DPDK_CONFIG_DEFAULT_TX_DESCRIPTORS 1024
122 #define DPDK_CONFIG_DEFAULT_RSS_HASH_FUNCTIONS RTE_ETH_RSS_IP
123 #define DPDK_CONFIG_DEFAULT_MTU 1500
124 #define DPDK_CONFIG_DEFAULT_PROMISCUOUS_MODE 1
125 #define DPDK_CONFIG_DEFAULT_MULTICAST_MODE 1
126 #define DPDK_CONFIG_DEFAULT_CHECKSUM_VALIDATION 1
127 #define DPDK_CONFIG_DEFAULT_CHECKSUM_VALIDATION_OFFLOAD 1
128 #define DPDK_CONFIG_DEFAULT_COPY_MODE "none"
129 #define DPDK_CONFIG_DEFAULT_COPY_INTERFACE "none"
133 .irq_mode =
"interrupt-mode",
134 .promisc =
"promisc",
135 .multicast =
"multicast",
136 .checksum_checks =
"checksum-checks",
137 .checksum_checks_offload =
"checksum-checks-offload",
139 .rss_hf =
"rss-hash-functions",
140 .mempool_size =
"mempool-size",
141 .mempool_cache_size =
"mempool-cache-size",
142 .rx_descriptors =
"rx-descriptors",
143 .tx_descriptors =
"tx-descriptors",
144 .copy_mode =
"copy-mode",
145 .copy_iface =
"copy-iface",
148 static int GreatestDivisorUpTo(uint32_t num, uint32_t max_num)
150 for (
int i = max_num; i >= 2; i--) {
158 static char *AllocArgument(
size_t arg_len)
164 ptr = (
char *)
SCCalloc(arg_len,
sizeof(
char));
166 FatalError(
"Could not allocate memory for an argument");
176 static char *AllocAndSetArgument(
const char *arg)
180 FatalError(
"Passed argument is NULL in DPDK config initialization");
183 size_t arg_len = strlen(arg);
185 ptr = AllocArgument(arg_len);
186 strlcpy(ptr, arg, arg_len + 1);
190 static char *AllocAndSetOption(
const char *arg)
194 FatalError(
"Passed option is NULL in DPDK config initialization");
197 size_t arg_len = strlen(arg);
198 uint8_t is_long_arg = arg_len > 1;
199 const char *dash_prefix = is_long_arg ?
"--" :
"-";
200 size_t full_len = arg_len + strlen(dash_prefix);
202 ptr = AllocArgument(full_len);
203 strlcpy(ptr, dash_prefix, strlen(dash_prefix) + 1);
204 strlcat(ptr, arg, full_len + 1);
208 static void ArgumentsInit(
struct Arguments *args,
unsigned capacity)
211 args->argv =
SCCalloc(capacity,
sizeof(*args->argv));
212 if (args->argv == NULL)
213 FatalError(
"Could not allocate memory for Arguments structure");
215 args->capacity = capacity;
220 static void ArgumentsCleanup(
struct Arguments *args)
223 for (
int i = 0; i < args->argc; i++) {
224 if (args->argv[i] != NULL) {
226 args->argv[i] = NULL;
236 static void ArgumentsAdd(
struct Arguments *args,
char *value)
239 if (args->argc + 1 > args->capacity)
240 FatalError(
"No capacity for more arguments (Max: %" PRIu32
")", EAL_ARGS);
242 args->argv[args->argc++] = value;
246 static void ArgumentsAddOptionAndArgument(
struct Arguments *args,
const char *opt,
const char *arg)
252 option = AllocAndSetOption(opt);
253 ArgumentsAdd(args, option);
256 if (arg == NULL || arg[0] ==
'\0')
259 argument = AllocAndSetArgument(arg);
260 ArgumentsAdd(args, argument);
264 static void InitEal(
void)
270 struct Arguments args;
273 if (eal_params == NULL) {
274 FatalError(
"DPDK EAL parameters not found in the config");
277 ArgumentsInit(&args, EAL_ARGS);
278 ArgumentsAdd(&args, AllocAndSetArgument(
"suricata"));
282 const char *key = param->
name;
285 ArgumentsAddOptionAndArgument(&args, key, (
const char *)val->
val);
289 ArgumentsAddOptionAndArgument(&args, param->
name, param->
val);
293 eal_argv =
SCCalloc(args.argc,
sizeof(*args.argv));
294 if (eal_argv == NULL) {
295 FatalError(
"Failed to allocate memory for the array of DPDK EAL arguments");
297 memcpy(eal_argv, args.argv, args.argc *
sizeof(*args.argv));
299 rte_log_set_global_level(RTE_LOG_WARNING);
300 retval = rte_eal_init(args.argc, eal_argv);
302 ArgumentsCleanup(&args);
306 FatalError(
"DPDK EAL initialization error: %s", rte_strerror(-retval));
311 static void DPDKDerefConfig(
void *conf)
317 if (iconf->pkt_mempool != NULL) {
318 rte_mempool_free(iconf->pkt_mempool);
332 FatalError(
"Could not allocate memory for DPDKIfaceConfig");
334 ptr->pkt_mempool = NULL;
335 ptr->out_port_id = -1;
338 ptr->DerefFunc = DPDKDerefConfig;
345 static void ConfigSetIface(
DPDKIfaceConfig *iconf,
const char *entry_str)
350 if (entry_str == NULL || entry_str[0] ==
'\0')
351 FatalError(
"Interface name in DPDK config is NULL or empty");
353 retval = rte_eth_dev_get_port_by_name(entry_str, &iconf->port_id);
355 FatalError(
"%s: interface not found: %s", entry_str, rte_strerror(-retval));
357 strlcpy(iconf->iface, entry_str,
sizeof(iconf->iface));
361 static int ConfigSetThreads(
DPDKIfaceConfig *iconf,
const char *entry_str)
364 static int32_t remaining_auto_cpus = -1;
366 SCLogError(
"DPDK runmode requires configured thread affinity");
372 SCLogError(
"Specify worker-cpu-set list in the threading section");
377 SCLogError(
"Specify management-cpu-set list in the threading section");
383 "\"all\" specified in worker CPU cores affinity, excluding management threads");
384 UtilAffinityCpusExclude(wtaf, mtaf);
388 if (sched_cpus == 0) {
389 SCLogError(
"No worker CPU cores with configured affinity were configured");
391 }
else if (UtilAffinityCpusOverlap(wtaf, mtaf) != 0) {
392 SCLogWarning(
"Worker threads should not overlap with management threads in the CPU core "
393 "affinity configuration");
397 if (active_runmode && !strcmp(
"single", active_runmode)) {
402 if (entry_str == NULL) {
403 SCLogError(
"Number of threads for interface \"%s\" not specified", iconf->iface);
407 if (strcmp(entry_str,
"auto") == 0) {
409 if (iconf->threads == 0) {
410 SCLogError(
"Not enough worker CPU cores with affinity were configured");
414 if (remaining_auto_cpus > 0) {
416 remaining_auto_cpus--;
417 }
else if (remaining_auto_cpus == -1) {
419 if (remaining_auto_cpus > 0) {
421 remaining_auto_cpus--;
424 SCLogConfig(
"%s: auto-assigned %u threads", iconf->iface, iconf->threads);
429 SCLogError(
"Threads entry for interface %s contain non-numerical characters - \"%s\"",
430 iconf->iface, entry_str);
434 if (iconf->threads <= 0) {
435 SCLogError(
"%s: positive number of threads required", iconf->iface);
442 static bool ConfigSetInterruptMode(
DPDKIfaceConfig *iconf,
bool enable)
451 static int ConfigSetRxQueues(
DPDKIfaceConfig *iconf, uint16_t nb_queues)
454 iconf->nb_rx_queues = nb_queues;
455 if (iconf->nb_rx_queues < 1) {
456 SCLogError(
"%s: positive number of RX queues is required", iconf->iface);
463 static int ConfigSetTxQueues(
DPDKIfaceConfig *iconf, uint16_t nb_queues)
466 iconf->nb_tx_queues = nb_queues;
467 if (iconf->nb_tx_queues < 1) {
468 SCLogError(
"%s: positive number of TX queues is required", iconf->iface);
475 static int ConfigSetMempoolSize(
DPDKIfaceConfig *iconf, intmax_t entry_int)
478 if (entry_int <= 0) {
479 SCLogError(
"%s: positive memory pool size is required", iconf->iface);
481 }
else if (entry_int > UINT32_MAX) {
482 SCLogError(
"%s: memory pool size cannot exceed %" PRIu32, iconf->iface, UINT32_MAX);
486 iconf->mempool_size = entry_int;
490 static int ConfigSetMempoolCacheSize(
DPDKIfaceConfig *iconf,
const char *entry_str)
493 if (entry_str == NULL || entry_str[0] ==
'\0' || strcmp(entry_str,
"auto") == 0) {
498 if (iconf->mempool_size == 0) {
499 SCLogError(
"%s: cannot calculate mempool cache size of a mempool with size %d",
500 iconf->iface, iconf->mempool_size);
504 uint32_t max_cache_size =
MIN(RTE_MEMPOOL_CACHE_MAX_SIZE, iconf->mempool_size / 1.5);
505 iconf->mempool_cache_size = GreatestDivisorUpTo(iconf->mempool_size, max_cache_size);
510 SCLogError(
"%s: mempool cache size entry contain non-numerical characters - \"%s\"",
511 iconf->iface, entry_str);
515 if (iconf->mempool_cache_size <= 0 || iconf->mempool_cache_size > RTE_MEMPOOL_CACHE_MAX_SIZE) {
516 SCLogError(
"%s: mempool cache size requires a positive number smaller than %" PRIu32,
517 iconf->iface, RTE_MEMPOOL_CACHE_MAX_SIZE);
524 static int ConfigSetRxDescriptors(
DPDKIfaceConfig *iconf, intmax_t entry_int)
527 if (entry_int <= 0) {
528 SCLogError(
"%s: positive number of RX descriptors is required", iconf->iface);
530 }
else if (entry_int > UINT16_MAX) {
531 SCLogError(
"%s: number of RX descriptors cannot exceed %" PRIu16, iconf->iface, UINT16_MAX);
535 iconf->nb_rx_desc = entry_int;
539 static int ConfigSetTxDescriptors(
DPDKIfaceConfig *iconf, intmax_t entry_int)
542 if (entry_int <= 0) {
543 SCLogError(
"%s: positive number of TX descriptors is required", iconf->iface);
545 }
else if (entry_int > UINT16_MAX) {
546 SCLogError(
"%s: number of TX descriptors cannot exceed %" PRIu16, iconf->iface, UINT16_MAX);
550 iconf->nb_tx_desc = entry_int;
554 static int ConfigSetRSSHashFunctions(
DPDKIfaceConfig *iconf,
const char *entry_str)
557 if (entry_str == NULL || entry_str[0] ==
'\0' || strcmp(entry_str,
"auto") == 0) {
558 iconf->rss_hf = DPDK_CONFIG_DEFAULT_RSS_HASH_FUNCTIONS;
563 SCLogError(
"%s: RSS hash functions entry contain non-numerical characters - \"%s\"",
564 iconf->iface, entry_str);
574 if (entry_int < RTE_ETHER_MIN_MTU || entry_int > RTE_ETHER_MAX_JUMBO_FRAME_LEN) {
575 SCLogError(
"%s: MTU size can only be between %" PRIu32
" and %" PRIu32, iconf->iface,
576 RTE_ETHER_MIN_MTU, RTE_ETHER_MAX_JUMBO_FRAME_LEN);
580 iconf->mtu = entry_int;
584 static bool ConfigSetPromiscuousMode(
DPDKIfaceConfig *iconf,
int entry_bool)
602 static int ConfigSetChecksumChecks(
DPDKIfaceConfig *iconf,
int entry_bool)
611 static int ConfigSetChecksumOffload(
DPDKIfaceConfig *iconf,
int entry_bool)
620 static int ConfigSetCopyIface(
DPDKIfaceConfig *iconf,
const char *entry_str)
625 if (entry_str == NULL || entry_str[0] ==
'\0' || strcmp(entry_str,
"none") == 0) {
626 iconf->out_iface = NULL;
630 retval = rte_eth_dev_get_port_by_name(entry_str, &iconf->out_port_id);
632 SCLogError(
"%s: copy interface (%s) not found: %s", iconf->iface, entry_str,
633 rte_strerror(-retval));
637 iconf->out_iface = entry_str;
641 static int ConfigSetCopyMode(
DPDKIfaceConfig *iconf,
const char *entry_str)
644 if (entry_str == NULL) {
645 SCLogWarning(
"%s: no copy mode specified, changing to %s ", iconf->iface,
646 DPDK_CONFIG_DEFAULT_COPY_MODE);
647 entry_str = DPDK_CONFIG_DEFAULT_COPY_MODE;
650 if (strcmp(entry_str,
"none") != 0 && strcmp(entry_str,
"tap") != 0 &&
651 strcmp(entry_str,
"ips") != 0) {
652 SCLogWarning(
"%s: copy mode \"%s\" is not one of the possible values (none|tap|ips). "
654 entry_str, iconf->iface, DPDK_CONFIG_DEFAULT_COPY_MODE);
655 entry_str = DPDK_CONFIG_DEFAULT_COPY_MODE;
658 if (strcmp(entry_str,
"none") == 0) {
660 }
else if (strcmp(entry_str,
"tap") == 0) {
662 }
else if (strcmp(entry_str,
"ips") == 0) {
669 static int ConfigSetCopyIfaceSettings(
DPDKIfaceConfig *iconf,
const char *iface,
const char *mode)
674 retval = ConfigSetCopyIface(iconf, iface);
678 retval = ConfigSetCopyMode(iconf, mode);
683 if (iconf->out_iface != NULL)
684 iconf->out_iface = NULL;
688 if (iconf->out_iface == NULL || strlen(iconf->out_iface) <= 0) {
689 SCLogError(
"%s: copy mode enabled but interface not set", iconf->iface);
702 const char *entry_str = NULL;
703 intmax_t entry_int = 0;
705 const char *copy_iface_str = NULL;
706 const char *copy_mode_str = NULL;
708 ConfigSetIface(iconf, iface);
712 FatalError(
"failed to find DPDK configuration for the interface %s", iconf->iface);
716 ? ConfigSetThreads(iconf, DPDK_CONFIG_DEFAULT_THREADS)
717 : ConfigSetThreads(iconf, entry_str);
724 irq_enable = DPDK_CONFIG_DEFAULT_INTERRUPT_MODE;
726 irq_enable = entry_bool ? true :
false;
728 retval = ConfigSetInterruptMode(iconf, irq_enable);
733 retval = ConfigSetRxQueues(iconf, (uint16_t)iconf->threads);
738 retval = ConfigSetTxQueues(iconf, (uint16_t)iconf->threads);
743 if_root, if_default, dpdk_yaml.
mempool_size, &entry_int) != 1
744 ? ConfigSetMempoolSize(iconf, DPDK_CONFIG_DEFAULT_MEMPOOL_SIZE)
745 : ConfigSetMempoolSize(iconf, entry_int);
751 ? ConfigSetMempoolCacheSize(iconf, DPDK_CONFIG_DEFAULT_MEMPOOL_CACHE_SIZE)
752 : ConfigSetMempoolCacheSize(iconf, entry_str);
758 ? ConfigSetRxDescriptors(iconf, DPDK_CONFIG_DEFAULT_RX_DESCRIPTORS)
759 : ConfigSetRxDescriptors(iconf, entry_int);
765 ? ConfigSetTxDescriptors(iconf, DPDK_CONFIG_DEFAULT_TX_DESCRIPTORS)
766 : ConfigSetTxDescriptors(iconf, entry_int);
771 ? ConfigSetMtu(iconf, DPDK_CONFIG_DEFAULT_MTU)
772 : ConfigSetMtu(iconf, entry_int);
777 ? ConfigSetRSSHashFunctions(iconf, NULL)
778 : ConfigSetRSSHashFunctions(iconf, entry_str);
783 if_root, if_default, dpdk_yaml.
promisc, &entry_bool) != 1
784 ? ConfigSetPromiscuousMode(iconf, DPDK_CONFIG_DEFAULT_PROMISCUOUS_MODE)
785 : ConfigSetPromiscuousMode(iconf, entry_bool);
790 if_root, if_default, dpdk_yaml.
multicast, &entry_bool) != 1
791 ? ConfigSetMulticast(iconf, DPDK_CONFIG_DEFAULT_MULTICAST_MODE)
792 : ConfigSetMulticast(iconf, entry_bool);
798 ? ConfigSetChecksumChecks(iconf, DPDK_CONFIG_DEFAULT_CHECKSUM_VALIDATION)
799 : ConfigSetChecksumChecks(iconf, entry_bool);
805 ? ConfigSetChecksumOffload(
806 iconf, DPDK_CONFIG_DEFAULT_CHECKSUM_VALIDATION_OFFLOAD)
807 : ConfigSetChecksumOffload(iconf, entry_bool);
818 if_root, if_default, dpdk_yaml.
copy_iface, ©_iface_str);
824 retval = ConfigSetCopyIfaceSettings(iconf, copy_iface_str, copy_mode_str);
831 static int32_t ConfigValidateThreads(uint16_t iface_threads)
833 static uint32_t total_cpus = 0;
834 total_cpus += iface_threads;
837 SCLogError(
"Specify worker-cpu-set list in the threading section");
841 SCLogError(
"Interfaces requested more cores than configured in the threading section "
842 "(requested %d configured %d",
859 retval = ConfigLoad(iconf, iface);
860 if (retval < 0 || ConfigValidateThreads(iconf->threads) != 0) {
861 iconf->DerefFunc(iconf);
868 static void DeviceSetPMDSpecificRSS(
struct rte_eth_rss_conf *rss_conf,
const char *driver_name)
871 if (strcmp(driver_name,
"net_i40e") == 0)
872 i40eDeviceSetRSSConf(rss_conf);
873 if (strcmp(driver_name,
"net_ice") == 0)
874 iceDeviceSetRSSConf(rss_conf);
875 if (strcmp(driver_name,
"net_ixgbe") == 0)
876 ixgbeDeviceSetRSSHashFunction(&rss_conf->rss_hf);
877 if (strcmp(driver_name,
"net_e1000_igb") == 0)
878 rss_conf->rss_hf = (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_IPV6_EX);
882 static int GetFirstSetBitPosition(uint64_t bits)
884 for (uint64_t i = 0; i < 64; i++) {
891 static void DumpRSSFlags(
const uint64_t requested,
const uint64_t actual)
896 "RTE_ETH_RSS_IP %sset", ((requested & RTE_ETH_RSS_IP) == RTE_ETH_RSS_IP) ?
"" :
"NOT ");
898 ((requested & RTE_ETH_RSS_TCP) == RTE_ETH_RSS_TCP) ?
"" :
"NOT ");
900 ((requested & RTE_ETH_RSS_UDP) == RTE_ETH_RSS_UDP) ?
"" :
"NOT ");
902 ((requested & RTE_ETH_RSS_SCTP) == RTE_ETH_RSS_SCTP) ?
"" :
"NOT ");
904 ((requested & RTE_ETH_RSS_TUNNEL) == RTE_ETH_RSS_TUNNEL) ?
"" :
"NOT ");
907 SCLogConfig(
"RTE_ETH_RSS_IPV4 (Bit position: %d) %sset",
908 GetFirstSetBitPosition(RTE_ETH_RSS_IPV4), (requested & RTE_ETH_RSS_IPV4) ?
"" :
"NOT ");
909 SCLogConfig(
"RTE_ETH_RSS_FRAG_IPV4 (Bit position: %d) %sset",
910 GetFirstSetBitPosition(RTE_ETH_RSS_FRAG_IPV4),
911 (requested & RTE_ETH_RSS_FRAG_IPV4) ?
"" :
"NOT ");
912 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV4_TCP (Bit position: %d) %sset",
913 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV4_TCP),
914 (requested & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ?
"" :
"NOT ");
915 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV4_UDP (Bit position: %d) %sset",
916 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV4_UDP),
917 (requested & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ?
"" :
"NOT ");
918 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV4_SCTP (Bit position: %d) %sset",
919 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV4_SCTP),
920 (requested & RTE_ETH_RSS_NONFRAG_IPV4_SCTP) ?
"" :
"NOT ");
921 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV4_OTHER (Bit position: %d) %sset",
922 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV4_OTHER),
923 (requested & RTE_ETH_RSS_NONFRAG_IPV4_OTHER) ?
"" :
"NOT ");
924 SCLogConfig(
"RTE_ETH_RSS_IPV6 (Bit position: %d) %sset",
925 GetFirstSetBitPosition(RTE_ETH_RSS_IPV6), (requested & RTE_ETH_RSS_IPV6) ?
"" :
"NOT ");
926 SCLogConfig(
"RTE_ETH_RSS_FRAG_IPV6 (Bit position: %d) %sset",
927 GetFirstSetBitPosition(RTE_ETH_RSS_FRAG_IPV6),
928 (requested & RTE_ETH_RSS_FRAG_IPV6) ?
"" :
"NOT ");
929 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_TCP (Bit position: %d) %sset",
930 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV6_TCP),
931 (requested & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ?
"" :
"NOT ");
932 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_UDP (Bit position: %d) %sset",
933 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV6_UDP),
934 (requested & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ?
"" :
"NOT ");
935 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_SCTP (Bit position: %d) %sset",
936 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV6_SCTP),
937 (requested & RTE_ETH_RSS_NONFRAG_IPV6_SCTP) ?
"" :
"NOT ");
938 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_OTHER (Bit position: %d) %sset",
939 GetFirstSetBitPosition(RTE_ETH_RSS_NONFRAG_IPV6_OTHER),
940 (requested & RTE_ETH_RSS_NONFRAG_IPV6_OTHER) ?
"" :
"NOT ");
942 SCLogConfig(
"RTE_ETH_RSS_L2_PAYLOAD (Bit position: %d) %sset",
943 GetFirstSetBitPosition(RTE_ETH_RSS_L2_PAYLOAD),
944 (requested & RTE_ETH_RSS_L2_PAYLOAD) ?
"" :
"NOT ");
945 SCLogConfig(
"RTE_ETH_RSS_IPV6_EX (Bit position: %d) %sset",
946 GetFirstSetBitPosition(RTE_ETH_RSS_IPV6_EX),
947 (requested & RTE_ETH_RSS_IPV6_EX) ?
"" :
"NOT ");
948 SCLogConfig(
"RTE_ETH_RSS_IPV6_TCP_EX (Bit position: %d) %sset",
949 GetFirstSetBitPosition(RTE_ETH_RSS_IPV6_TCP_EX),
950 (requested & RTE_ETH_RSS_IPV6_TCP_EX) ?
"" :
"NOT ");
951 SCLogConfig(
"RTE_ETH_RSS_IPV6_UDP_EX (Bit position: %d) %sset",
952 GetFirstSetBitPosition(RTE_ETH_RSS_IPV6_UDP_EX),
953 (requested & RTE_ETH_RSS_IPV6_UDP_EX) ?
"" :
"NOT ");
955 SCLogConfig(
"RTE_ETH_RSS_PORT (Bit position: %d) %sset",
956 GetFirstSetBitPosition(RTE_ETH_RSS_PORT), (requested & RTE_ETH_RSS_PORT) ?
"" :
"NOT ");
957 SCLogConfig(
"RTE_ETH_RSS_VXLAN (Bit position: %d) %sset",
958 GetFirstSetBitPosition(RTE_ETH_RSS_VXLAN),
959 (requested & RTE_ETH_RSS_VXLAN) ?
"" :
"NOT ");
960 SCLogConfig(
"RTE_ETH_RSS_NVGRE (Bit position: %d) %sset",
961 GetFirstSetBitPosition(RTE_ETH_RSS_NVGRE),
962 (requested & RTE_ETH_RSS_NVGRE) ?
"" :
"NOT ");
963 SCLogConfig(
"RTE_ETH_RSS_GTPU (Bit position: %d) %sset",
964 GetFirstSetBitPosition(RTE_ETH_RSS_GTPU), (requested & RTE_ETH_RSS_GTPU) ?
"" :
"NOT ");
966 SCLogConfig(
"RTE_ETH_RSS_L3_SRC_ONLY (Bit position: %d) %sset",
967 GetFirstSetBitPosition(RTE_ETH_RSS_L3_SRC_ONLY),
968 (requested & RTE_ETH_RSS_L3_SRC_ONLY) ?
"" :
"NOT ");
969 SCLogConfig(
"RTE_ETH_RSS_L3_DST_ONLY (Bit position: %d) %sset",
970 GetFirstSetBitPosition(RTE_ETH_RSS_L3_DST_ONLY),
971 (requested & RTE_ETH_RSS_L3_DST_ONLY) ?
"" :
"NOT ");
972 SCLogConfig(
"RTE_ETH_RSS_L4_SRC_ONLY (Bit position: %d) %sset",
973 GetFirstSetBitPosition(RTE_ETH_RSS_L4_SRC_ONLY),
974 (requested & RTE_ETH_RSS_L4_SRC_ONLY) ?
"" :
"NOT ");
975 SCLogConfig(
"RTE_ETH_RSS_L4_DST_ONLY (Bit position: %d) %sset",
976 GetFirstSetBitPosition(RTE_ETH_RSS_L4_DST_ONLY),
977 (requested & RTE_ETH_RSS_L4_DST_ONLY) ?
"" :
"NOT ");
980 "RTE_ETH_RSS_IP %sset", ((actual & RTE_ETH_RSS_IP) == RTE_ETH_RSS_IP) ?
"" :
"NOT ");
982 "RTE_ETH_RSS_TCP %sset", ((actual & RTE_ETH_RSS_TCP) == RTE_ETH_RSS_TCP) ?
"" :
"NOT ");
984 "RTE_ETH_RSS_UDP %sset", ((actual & RTE_ETH_RSS_UDP) == RTE_ETH_RSS_UDP) ?
"" :
"NOT ");
986 ((actual & RTE_ETH_RSS_SCTP) == RTE_ETH_RSS_SCTP) ?
"" :
"NOT ");
988 ((actual & RTE_ETH_RSS_TUNNEL) == RTE_ETH_RSS_TUNNEL) ?
"" :
"NOT ");
991 SCLogConfig(
"RTE_ETH_RSS_IPV4 %sset", (actual & RTE_ETH_RSS_IPV4) ?
"" :
"NOT ");
992 SCLogConfig(
"RTE_ETH_RSS_FRAG_IPV4 %sset", (actual & RTE_ETH_RSS_FRAG_IPV4) ?
"" :
"NOT ");
994 (actual & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ?
"" :
"NOT ");
996 (actual & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ?
"" :
"NOT ");
998 (actual & RTE_ETH_RSS_NONFRAG_IPV4_SCTP) ?
"" :
"NOT ");
999 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV4_OTHER %sset",
1000 (actual & RTE_ETH_RSS_NONFRAG_IPV4_OTHER) ?
"" :
"NOT ");
1001 SCLogConfig(
"RTE_ETH_RSS_IPV6 %sset", (actual & RTE_ETH_RSS_IPV6) ?
"" :
"NOT ");
1002 SCLogConfig(
"RTE_ETH_RSS_FRAG_IPV6 %sset", (actual & RTE_ETH_RSS_FRAG_IPV6) ?
"" :
"NOT ");
1004 (actual & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ?
"" :
"NOT ");
1006 (actual & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ?
"" :
"NOT ");
1007 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_SCTP %sset",
1008 (actual & RTE_ETH_RSS_NONFRAG_IPV6_SCTP) ?
"" :
"NOT ");
1009 SCLogConfig(
"RTE_ETH_RSS_NONFRAG_IPV6_OTHER %sset",
1010 (actual & RTE_ETH_RSS_NONFRAG_IPV6_OTHER) ?
"" :
"NOT ");
1012 SCLogConfig(
"RTE_ETH_RSS_L2_PAYLOAD %sset", (actual & RTE_ETH_RSS_L2_PAYLOAD) ?
"" :
"NOT ");
1013 SCLogConfig(
"RTE_ETH_RSS_IPV6_EX %sset", (actual & RTE_ETH_RSS_IPV6_EX) ?
"" :
"NOT ");
1014 SCLogConfig(
"RTE_ETH_RSS_IPV6_TCP_EX %sset", (actual & RTE_ETH_RSS_IPV6_TCP_EX) ?
"" :
"NOT ");
1015 SCLogConfig(
"RTE_ETH_RSS_IPV6_UDP_EX %sset", (actual & RTE_ETH_RSS_IPV6_UDP_EX) ?
"" :
"NOT ");
1017 SCLogConfig(
"RTE_ETH_RSS_PORT %sset", (actual & RTE_ETH_RSS_PORT) ?
"" :
"NOT ");
1018 SCLogConfig(
"RTE_ETH_RSS_VXLAN %sset", (actual & RTE_ETH_RSS_VXLAN) ?
"" :
"NOT ");
1019 SCLogConfig(
"RTE_ETH_RSS_NVGRE %sset", (actual & RTE_ETH_RSS_NVGRE) ?
"" :
"NOT ");
1020 SCLogConfig(
"RTE_ETH_RSS_GTPU %sset", (actual & RTE_ETH_RSS_GTPU) ?
"" :
"NOT ");
1022 SCLogConfig(
"RTE_ETH_RSS_L3_SRC_ONLY %sset", (actual & RTE_ETH_RSS_L3_SRC_ONLY) ?
"" :
"NOT ");
1023 SCLogConfig(
"RTE_ETH_RSS_L3_DST_ONLY %sset", (actual & RTE_ETH_RSS_L3_DST_ONLY) ?
"" :
"NOT ");
1024 SCLogConfig(
"RTE_ETH_RSS_L4_SRC_ONLY %sset", (actual & RTE_ETH_RSS_L4_SRC_ONLY) ?
"" :
"NOT ");
1025 SCLogConfig(
"RTE_ETH_RSS_L4_DST_ONLY %sset", (actual & RTE_ETH_RSS_L4_DST_ONLY) ?
"" :
"NOT ");
1028 static void DumpRXOffloadCapabilities(
const uint64_t rx_offld_capa)
1030 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_VLAN_STRIP - %savailable",
1031 rx_offld_capa & RTE_ETH_RX_OFFLOAD_VLAN_STRIP ?
"" :
"NOT ");
1032 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_IPV4_CKSUM - %savailable",
1033 rx_offld_capa & RTE_ETH_RX_OFFLOAD_IPV4_CKSUM ?
"" :
"NOT ");
1034 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_UDP_CKSUM - %savailable",
1035 rx_offld_capa & RTE_ETH_RX_OFFLOAD_UDP_CKSUM ?
"" :
"NOT ");
1036 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_TCP_CKSUM - %savailable",
1037 rx_offld_capa & RTE_ETH_RX_OFFLOAD_TCP_CKSUM ?
"" :
"NOT ");
1038 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_TCP_LRO - %savailable",
1039 rx_offld_capa & RTE_ETH_RX_OFFLOAD_TCP_LRO ?
"" :
"NOT ");
1040 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_QINQ_STRIP - %savailable",
1041 rx_offld_capa & RTE_ETH_RX_OFFLOAD_QINQ_STRIP ?
"" :
"NOT ");
1042 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM - %savailable",
1043 rx_offld_capa & RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM ?
"" :
"NOT ");
1044 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_MACSEC_STRIP - %savailable",
1045 rx_offld_capa & RTE_ETH_RX_OFFLOAD_MACSEC_STRIP ?
"" :
"NOT ");
1046 #if RTE_VERSION < RTE_VERSION_NUM(22, 11, 0, 0)
1047 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_HEADER_SPLIT - %savailable",
1048 rx_offld_capa & RTE_ETH_RX_OFFLOAD_HEADER_SPLIT ?
"" :
"NOT ");
1050 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_VLAN_FILTER - %savailable",
1051 rx_offld_capa & RTE_ETH_RX_OFFLOAD_VLAN_FILTER ?
"" :
"NOT ");
1052 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_VLAN_EXTEND - %savailable",
1053 rx_offld_capa & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND ?
"" :
"NOT ");
1054 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_SCATTER - %savailable",
1055 rx_offld_capa & RTE_ETH_RX_OFFLOAD_SCATTER ?
"" :
"NOT ");
1056 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_TIMESTAMP - %savailable",
1057 rx_offld_capa & RTE_ETH_RX_OFFLOAD_TIMESTAMP ?
"" :
"NOT ");
1058 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_SECURITY - %savailable",
1059 rx_offld_capa & RTE_ETH_RX_OFFLOAD_SECURITY ?
"" :
"NOT ");
1060 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_KEEP_CRC - %savailable",
1061 rx_offld_capa & RTE_ETH_RX_OFFLOAD_KEEP_CRC ?
"" :
"NOT ");
1062 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_SCTP_CKSUM - %savailable",
1063 rx_offld_capa & RTE_ETH_RX_OFFLOAD_SCTP_CKSUM ?
"" :
"NOT ");
1064 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM - %savailable",
1065 rx_offld_capa & RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM ?
"" :
"NOT ");
1066 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_RSS_HASH - %savailable",
1067 rx_offld_capa & RTE_ETH_RX_OFFLOAD_RSS_HASH ?
"" :
"NOT ");
1068 #if RTE_VERSION >= RTE_VERSION_NUM(20, 11, 0, 0)
1069 SCLogConfig(
"RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT - %savailable",
1070 rx_offld_capa & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT ?
"" :
"NOT ");
1074 static int DeviceValidateMTU(
const DPDKIfaceConfig *iconf,
const struct rte_eth_dev_info *dev_info)
1077 if (iconf->mtu > dev_info->max_mtu || iconf->mtu < dev_info->min_mtu) {
1079 "Min MTU: %" PRIu16
" Max MTU: %" PRIu16,
1080 iconf->iface, dev_info->min_mtu, dev_info->max_mtu);
1084 #if RTE_VERSION < RTE_VERSION_NUM(21, 11, 0, 0)
1086 if (iconf->mtu > RTE_ETHER_MAX_LEN &&
1087 !(dev_info->rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME)) {
1088 SCLogError(
"%s: jumbo frames not supported, set MTU to 1500", iconf->iface);
1096 static void DeviceSetMTU(
struct rte_eth_conf *port_conf, uint16_t mtu)
1098 #if RTE_VERSION >= RTE_VERSION_NUM(21, 11, 0, 0)
1099 port_conf->rxmode.mtu = mtu;
1101 port_conf->rxmode.max_rx_pkt_len = mtu;
1102 if (mtu > RTE_ETHER_MAX_LEN) {
1103 port_conf->rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
1113 static int32_t DeviceSetSocketID(uint16_t port_id, int32_t *socket_id)
1116 int retval = rte_eth_dev_socket_id(port_id);
1117 *socket_id = retval;
1119 #if RTE_VERSION >= RTE_VERSION_NUM(22, 11, 0, 0) // DPDK API changed since 22.11
1120 retval = -rte_errno;
1122 if (retval == SOCKET_ID_ANY)
1129 static void PortConfSetInterruptMode(
const DPDKIfaceConfig *iconf,
struct rte_eth_conf *port_conf)
1131 SCLogConfig(
"%s: interrupt mode is %s", iconf->iface,
1134 port_conf->intr_conf.rxq = 1;
1138 const struct rte_eth_dev_info *dev_info,
struct rte_eth_conf *port_conf)
1140 if (dev_info->rx_offload_capa & RTE_ETH_RX_OFFLOAD_RSS_HASH) {
1141 if (iconf->nb_rx_queues > 1) {
1142 SCLogConfig(
"%s: RSS enabled for %d queues", iconf->iface, iconf->nb_rx_queues);
1143 port_conf->rx_adv_conf.rss_conf = (
struct rte_eth_rss_conf){
1144 .rss_key = rss_hkey,
1145 .rss_key_len = RSS_HKEY_LEN,
1146 .rss_hf = iconf->rss_hf,
1149 const char *dev_driver = dev_info->driver_name;
1150 if (strcmp(dev_info->driver_name,
"net_bonding") == 0) {
1151 dev_driver = BondingDeviceDriverGet(iconf->port_id);
1154 DeviceSetPMDSpecificRSS(&port_conf->rx_adv_conf.rss_conf, dev_driver);
1156 uint64_t rss_hf_tmp =
1157 port_conf->rx_adv_conf.rss_conf.rss_hf & dev_info->flow_type_rss_offloads;
1158 if (port_conf->rx_adv_conf.rss_conf.rss_hf != rss_hf_tmp) {
1159 DumpRSSFlags(port_conf->rx_adv_conf.rss_conf.rss_hf, rss_hf_tmp);
1161 SCLogWarning(
"%s: modified RSS hash function based on hardware support: "
1162 "requested:%#" PRIx64
", configured:%#" PRIx64,
1163 iconf->iface, port_conf->rx_adv_conf.rss_conf.rss_hf, rss_hf_tmp);
1164 port_conf->rx_adv_conf.rss_conf.rss_hf = rss_hf_tmp;
1166 port_conf->rxmode.mq_mode = RTE_ETH_MQ_RX_RSS;
1169 port_conf->rx_adv_conf.rss_conf.rss_key = NULL;
1170 port_conf->rx_adv_conf.rss_conf.rss_hf = 0;
1173 SCLogConfig(
"%s: RSS not supported", iconf->iface);
1178 const struct rte_eth_dev_info *dev_info,
struct rte_eth_conf *port_conf)
1181 SCLogConfig(
"%s: checksum validation disabled", iconf->iface);
1182 }
else if ((dev_info->rx_offload_capa & RTE_ETH_RX_OFFLOAD_CHECKSUM) ==
1183 RTE_ETH_RX_OFFLOAD_CHECKSUM) {
1186 SCLogConfig(
"%s: IP, TCP and UDP checksum validation offloaded", iconf->iface);
1187 port_conf->rxmode.offloads |= RTE_ETH_RX_OFFLOAD_CHECKSUM;
1190 SCLogConfig(
"%s: checksum validation enabled (but can be offloaded)", iconf->iface);
1196 const struct rte_eth_dev_info *dev_info,
struct rte_eth_conf *port_conf)
1198 DumpRXOffloadCapabilities(dev_info->rx_offload_capa);
1199 *port_conf = (
struct rte_eth_conf){
1201 .mq_mode = RTE_ETH_MQ_RX_NONE,
1205 .mq_mode = RTE_ETH_MQ_TX_NONE,
1210 PortConfSetInterruptMode(iconf, port_conf);
1213 PortConfSetRSSConf(iconf, dev_info, port_conf);
1214 PortConfSetChsumOffload(iconf, dev_info, port_conf);
1215 DeviceSetMTU(port_conf, iconf->mtu);
1217 if (dev_info->tx_offload_capa & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) {
1218 port_conf->txmode.offloads |= RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
1222 static int DeviceConfigureQueues(
DPDKIfaceConfig *iconf,
const struct rte_eth_dev_info *dev_info,
1223 const struct rte_eth_conf *port_conf)
1229 struct rte_eth_rxconf rxq_conf;
1230 struct rte_eth_txconf txq_conf;
1232 char mempool_name[64];
1233 snprintf(mempool_name, 64,
"mempool_%.20s", iconf->iface);
1235 mtu_size = iconf->mtu + RTE_ETHER_CRC_LEN + RTE_ETHER_HDR_LEN + 4;
1236 mbuf_size = ROUNDUP(mtu_size, 1024) + RTE_PKTMBUF_HEADROOM;
1237 SCLogConfig(
"%s: creating packet mbuf pool %s of size %d, cache size %d, mbuf size %d",
1238 iconf->iface, mempool_name, iconf->mempool_size, iconf->mempool_cache_size, mbuf_size);
1240 iconf->pkt_mempool = rte_pktmbuf_pool_create(mempool_name, iconf->mempool_size,
1241 iconf->mempool_cache_size, 0, mbuf_size, (
int)iconf->socket_id);
1242 if (iconf->pkt_mempool == NULL) {
1243 retval = -rte_errno;
1244 SCLogError(
"%s: rte_pktmbuf_pool_create failed with code %d (mempool: %s): %s",
1245 iconf->iface, rte_errno, mempool_name, rte_strerror(rte_errno));
1249 for (uint16_t queue_id = 0; queue_id < iconf->nb_rx_queues; queue_id++) {
1250 rxq_conf = dev_info->default_rxconf;
1251 rxq_conf.offloads = port_conf->rxmode.offloads;
1252 rxq_conf.rx_thresh.hthresh = 0;
1253 rxq_conf.rx_thresh.pthresh = 0;
1254 rxq_conf.rx_thresh.wthresh = 0;
1255 rxq_conf.rx_free_thresh = 0;
1256 rxq_conf.rx_drop_en = 0;
1257 SCLogConfig(
"%s: setting up RX queue %d: rx_desc: %u offloads: 0x%" PRIx64
1258 " hthresh: %" PRIu8
" pthresh: %" PRIu8
" wthresh: %" PRIu8
1259 " free_thresh: %" PRIu16
" drop_en: %" PRIu8,
1260 iconf->iface, queue_id, iconf->nb_rx_desc, rxq_conf.offloads,
1261 rxq_conf.rx_thresh.hthresh, rxq_conf.rx_thresh.pthresh, rxq_conf.rx_thresh.wthresh,
1262 rxq_conf.rx_free_thresh, rxq_conf.rx_drop_en);
1264 retval = rte_eth_rx_queue_setup(iconf->port_id, queue_id, iconf->nb_rx_desc,
1265 iconf->socket_id, &rxq_conf, iconf->pkt_mempool);
1267 rte_mempool_free(iconf->pkt_mempool);
1268 SCLogError(
"%s: failed to setup RX queue %u: %s", iconf->iface, queue_id,
1269 rte_strerror(-retval));
1274 for (uint16_t queue_id = 0; queue_id < iconf->nb_tx_queues; queue_id++) {
1275 txq_conf = dev_info->default_txconf;
1276 txq_conf.offloads = port_conf->txmode.offloads;
1277 SCLogConfig(
"%s: setting up TX queue %d: tx_desc: %" PRIu16
" tx: offloads: 0x%" PRIx64
1278 " hthresh: %" PRIu8
" pthresh: %" PRIu8
" wthresh: %" PRIu8
1279 " tx_free_thresh: %" PRIu16
" tx_rs_thresh: %" PRIu16
1280 " txq_deferred_start: %" PRIu8,
1281 iconf->iface, queue_id, iconf->nb_tx_desc, txq_conf.offloads,
1282 txq_conf.tx_thresh.hthresh, txq_conf.tx_thresh.pthresh, txq_conf.tx_thresh.wthresh,
1283 txq_conf.tx_free_thresh, txq_conf.tx_rs_thresh, txq_conf.tx_deferred_start);
1284 retval = rte_eth_tx_queue_setup(
1285 iconf->port_id, queue_id, iconf->nb_tx_desc, iconf->socket_id, &txq_conf);
1287 rte_mempool_free(iconf->pkt_mempool);
1288 SCLogError(
"%s: failed to setup TX queue %u: %s", iconf->iface, queue_id,
1289 rte_strerror(-retval));
1302 ConfigInit(&out_iconf);
1303 if (out_iconf == NULL) {
1304 FatalError(
"Copy interface of the interface \"%s\" is NULL", iconf->iface);
1307 retval = ConfigLoad(out_iconf, iconf->out_iface);
1309 SCLogError(
"%s: fail to load config of interface", iconf->out_iface);
1310 out_iconf->DerefFunc(out_iconf);
1314 if (iconf->nb_rx_queues != out_iconf->nb_tx_queues) {
1316 SCLogError(
"%s: configured %d RX queues but copy interface %s has %d TX queues"
1317 " - number of queues must be equal",
1318 iconf->iface, iconf->nb_rx_queues, out_iconf->iface, out_iconf->nb_tx_queues);
1319 out_iconf->DerefFunc(out_iconf);
1321 }
else if (iconf->mtu != out_iconf->mtu) {
1322 SCLogError(
"%s: configured MTU of %d but copy interface %s has MTU set to %d"
1323 " - MTU must be equal",
1324 iconf->iface, iconf->mtu, out_iconf->iface, out_iconf->mtu);
1325 out_iconf->DerefFunc(out_iconf);
1327 }
else if (iconf->copy_mode != out_iconf->copy_mode) {
1328 SCLogError(
"%s: copy modes of interfaces %s and %s are not equal", iconf->iface,
1329 iconf->iface, out_iconf->iface);
1330 out_iconf->DerefFunc(out_iconf);
1332 }
else if (strcmp(iconf->iface, out_iconf->out_iface) != 0) {
1334 SCLogError(
"%s: copy interface of %s is not set to %s", iconf->iface, out_iconf->iface,
1336 out_iconf->DerefFunc(out_iconf);
1340 out_iconf->DerefFunc(out_iconf);
1347 if (iconf->out_iface != NULL) {
1348 if (!rte_eth_dev_is_valid_port(iconf->out_port_id)) {
1349 SCLogError(
"%s: retrieved copy interface port ID \"%d\" is invalid or the device is "
1351 iconf->iface, iconf->out_port_id);
1354 int32_t out_port_socket_id;
1355 int retval = DeviceSetSocketID(iconf->out_port_id, &out_port_socket_id);
1357 SCLogError(
"%s: invalid socket id: %s", iconf->out_iface, rte_strerror(-retval));
1361 if (iconf->socket_id != out_port_socket_id) {
1363 "%s: out iface %s is not on the same NUMA node (%s - NUMA %d, %s - NUMA %d)",
1364 iconf->iface, iconf->out_iface, iconf->iface, iconf->socket_id,
1365 iconf->out_iface, out_port_socket_id);
1368 retval = DeviceValidateOutIfaceConfig(iconf);
1375 SCLogInfo(
"%s: DPDK IPS mode activated: %s->%s", iconf->iface, iconf->iface,
1378 SCLogInfo(
"%s: DPDK TAP mode activated: %s->%s", iconf->iface, iconf->iface,
1392 static int32_t DeviceVerifyPostConfigure(
1393 const DPDKIfaceConfig *iconf,
const struct rte_eth_dev_info *dev_info)
1396 struct rte_eth_dev_info post_conf_dev_info = { 0 };
1397 int32_t ret = rte_eth_dev_info_get(iconf->port_id, &post_conf_dev_info);
1399 SCLogError(
"%s: getting device info failed: %s", iconf->iface, rte_strerror(-ret));
1403 if (dev_info->flow_type_rss_offloads != post_conf_dev_info.flow_type_rss_offloads ||
1404 dev_info->rx_offload_capa != post_conf_dev_info.rx_offload_capa ||
1405 dev_info->tx_offload_capa != post_conf_dev_info.tx_offload_capa ||
1406 dev_info->max_rx_queues != post_conf_dev_info.max_rx_queues ||
1407 dev_info->max_tx_queues != post_conf_dev_info.max_tx_queues ||
1408 dev_info->max_mtu != post_conf_dev_info.max_mtu) {
1409 SCLogWarning(
"%s: device information severely changed after configuration, reconfiguring",
1414 if (strcmp(dev_info->driver_name,
"net_bonding") == 0) {
1415 ret = BondingAllDevicesSameDriver(iconf->port_id);
1417 SCLogError(
"%s: bond port uses port with different DPDK drivers", iconf->iface);
1428 if (!rte_eth_dev_is_valid_port(iconf->port_id)) {
1429 SCLogError(
"%s: retrieved port ID \"%d\" is invalid or the device is not attached ",
1430 iconf->iface, iconf->port_id);
1434 int32_t retval = DeviceSetSocketID(iconf->port_id, &iconf->socket_id);
1436 SCLogError(
"%s: invalid socket id: %s", iconf->iface, rte_strerror(-retval));
1440 struct rte_eth_dev_info dev_info = { 0 };
1441 retval = rte_eth_dev_info_get(iconf->port_id, &dev_info);
1443 SCLogError(
"%s: getting device info failed: %s", iconf->iface, rte_strerror(-retval));
1447 if (iconf->nb_rx_queues > dev_info.max_rx_queues) {
1448 SCLogError(
"%s: configured RX queues %u is higher than device maximum (%" PRIu16
")",
1449 iconf->iface, iconf->nb_rx_queues, dev_info.max_rx_queues);
1453 if (iconf->nb_tx_queues > dev_info.max_tx_queues) {
1454 SCLogError(
"%s: configured TX queues %u is higher than device maximum (%" PRIu16
")",
1455 iconf->iface, iconf->nb_tx_queues, dev_info.max_tx_queues);
1459 retval = DeviceValidateMTU(iconf, &dev_info);
1463 struct rte_eth_conf port_conf = { 0 };
1464 DeviceInitPortConf(iconf, &dev_info, &port_conf);
1465 if (port_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM) {
1470 retval = rte_eth_dev_configure(
1471 iconf->port_id, iconf->nb_rx_queues, iconf->nb_tx_queues, &port_conf);
1473 SCLogError(
"%s: failed to configure the device: %s", iconf->iface, rte_strerror(-retval));
1477 retval = DeviceVerifyPostConfigure(iconf, &dev_info);
1481 uint16_t tmp_nb_rx_desc = iconf->nb_rx_desc;
1482 uint16_t tmp_nb_tx_desc = iconf->nb_tx_desc;
1483 retval = rte_eth_dev_adjust_nb_rx_tx_desc(
1484 iconf->port_id, &iconf->nb_rx_desc, &iconf->nb_tx_desc);
1486 SCLogError(
"%s: failed to adjust device queue descriptors: %s", iconf->iface,
1487 rte_strerror(-retval));
1489 }
else if (tmp_nb_rx_desc != iconf->nb_rx_desc || tmp_nb_tx_desc != iconf->nb_tx_desc) {
1490 SCLogWarning(
"%s: device queue descriptors adjusted (RX: from %u to %u, TX: from %u to %u)",
1491 iconf->iface, tmp_nb_rx_desc, iconf->nb_rx_desc, tmp_nb_tx_desc, iconf->nb_tx_desc);
1494 retval = iconf->flags &
DPDK_MULTICAST ? rte_eth_allmulticast_enable(iconf->port_id)
1495 : rte_eth_allmulticast_disable(iconf->port_id);
1496 if (retval == -ENOTSUP) {
1497 retval = rte_eth_allmulticast_get(iconf->port_id);
1501 SCLogWarning(
"%s: cannot configure allmulticast, the port is %sin allmulticast mode",
1502 iconf->iface, retval == 1 ?
"" :
"not ");
1503 }
else if (retval < 0) {
1504 SCLogError(
"%s: failed to get multicast mode: %s", iconf->iface, rte_strerror(-retval));
1507 }
else if (retval < 0) {
1508 SCLogError(
"%s: error when changing multicast setting: %s", iconf->iface,
1509 rte_strerror(-retval));
1513 retval = iconf->flags &
DPDK_PROMISC ? rte_eth_promiscuous_enable(iconf->port_id)
1514 : rte_eth_promiscuous_disable(iconf->port_id);
1515 if (retval == -ENOTSUP) {
1516 retval = rte_eth_promiscuous_get(iconf->port_id);
1519 SCLogError(
"%s: cannot configure promiscuous mode, the port is in %spromiscuous mode",
1520 iconf->iface, retval == 1 ?
"" :
"non-");
1522 }
else if (retval < 0) {
1524 "%s: failed to get promiscuous mode: %s", iconf->iface, rte_strerror(-retval));
1527 }
else if (retval < 0) {
1528 SCLogError(
"%s: error when changing promiscuous setting: %s", iconf->iface,
1529 rte_strerror(-retval));
1534 SCLogConfig(
"%s: setting MTU to %d", iconf->iface, iconf->mtu);
1535 retval = rte_eth_dev_set_mtu(iconf->port_id, iconf->mtu);
1536 if (retval == -ENOTSUP) {
1538 retval = rte_eth_dev_get_mtu(iconf->port_id, &iconf->mtu);
1540 SCLogError(
"%s: failed to retrieve MTU: %s", iconf->iface, rte_strerror(-retval));
1544 "%s: changing MTU is not supported, current MTU: %u", iconf->iface, iconf->mtu);
1545 }
else if (retval < 0) {
1547 "%s: failed to set MTU to %u: %s", iconf->iface, iconf->mtu, rte_strerror(-retval));
1551 retval = DeviceConfigureQueues(iconf, &dev_info, &port_conf);
1556 retval = DeviceConfigureIPS(iconf);
1564 static void *ParseDpdkConfigAndConfigureDevice(
const char *iface)
1568 if (iconf == NULL) {
1569 FatalError(
"DPDK configuration could not be parsed");
1572 retval = DeviceConfigure(iconf);
1573 if (retval == -EAGAIN) {
1575 retval = DeviceConfigure(iconf);
1579 iconf->DerefFunc(iconf);
1580 if (rte_eal_cleanup() != 0)
1581 FatalError(
"EAL cleanup failed: %s", rte_strerror(-retval));
1583 if (retval == -ENOMEM) {
1584 FatalError(
"%s: memory allocation failed - consider"
1585 "%s freeing up some memory.",
1587 rte_eal_has_hugepages() != 0 ?
" increasing the number of hugepages or" :
"");
1589 FatalError(
"%s: failed to configure", iface);
1598 iconf->workers_sync =
SCCalloc(1,
sizeof(*iconf->workers_sync));
1599 if (iconf->workers_sync == NULL) {
1600 FatalError(
"Failed to allocate memory for workers_sync");
1603 iconf->workers_sync->worker_cnt = iconf->threads;
1607 if (ldev_instance == NULL) {
1608 FatalError(
"Device %s is not registered as a live device", iface);
1610 ldev_instance->dpdk_vars.pkt_mp = iconf->pkt_mempool;
1627 static int DPDKConfigGetThreadsCount(
void *conf)
1633 return dpdk_conf->threads;
1638 static int DPDKRunModeIsIPS(
void)
1641 const char dpdk_node_query[] =
"dpdk.interfaces";
1643 if (dpdk_node == NULL) {
1644 FatalError(
"Unable to get %s configuration node", dpdk_node_query);
1647 const char default_iface[] =
"default";
1650 bool has_ips =
false;
1651 bool has_ids =
false;
1652 for (
int ldev = 0; ldev < nlive; ldev++) {
1654 if (live_dev == NULL)
1655 FatalError(
"Unable to get device id %d from LiveDevice list", ldev);
1658 if (if_root == NULL) {
1659 if (if_default == NULL)
1660 FatalError(
"Unable to get %s or %s interface", live_dev, default_iface);
1662 if_root = if_default;
1665 const char *copymodestr = NULL;
1667 if (strcmp(copymodestr,
"ips") == 0) {
1676 if (has_ids && has_ips) {
1677 FatalError(
"Copy-mode of interface %s mixes with the previously set copy-modes "
1678 "(only IDS/TAP and IPS copy-mode combinations are allowed in DPDK",
1686 static void DPDKRunModeEnableIPS(
void)
1688 if (DPDKRunModeIsIPS()) {
1702 "Workers DPDK mode, each thread does all"
1703 " tasks from acquisition to logging",
1728 SCLogDebug(
"RunModeIdsDpdkWorkers initialised");